1. Field of the Invention
The invention relates in general to an image coding method. More particularly, this invention relates to a method and an operation apparatus of image compression coding embedded in matrix operation.
2. Description of the Related Art
In the recent years, as the development of mobile phone and internet becomes more and more advanced, the data transmitted to the computer or the mobile phone via cable or wireless network is more and more enormous. In addition to text data, the transmitted data further comprise audio or video information. The multimedia products that transceive the massive audio-video information are thus very popular. How to enhance the performance of signal transmitting and the economic efficiency becomes an important topic in industry.
It is well known that the multi-medium signal may include image, speech and various data signals. Generally speaking, the image signal is the most magnificent one among all the signals. For example, the image signal requires a speed of 3 Mbits/sec. (bps) for transmission, the speech signal requires only a speed of 64K bps for transmission. For the massive data of the speech or image signal, a compression operation is required for transmission or storage to save the memory space and the usage of communication bandwith, so as to enhance the transmitting and processing speed.
Among the current methods and standards for digital-type signal compression/decompression, the motion picture expert group (MPEF) standard, no matter MPEG-I or MPEG-II, is the most commonly applied standard for animation in multi-medium industry. Regarding the still image, JPEG is the common standard for compression/decompression. Both the MPEG and JPEG compression operation methods with a high compression ratio comprise three stages of operation. These three stages include transform, quantization and coding. The method of quantization comprises at least a bit-discard method for specific threshold value and sorting method.
In a conventional wavelet image compression algorithm, a zero-tree data structure of wavelet transform coefficient is used to accommodate a bit plane coding technique to obtain a data stream with a high compression ratio and embedded properties. This kind of embedded wavelet compression image data stream includes the advantages of progressive transmission, precision in controlling coding length and error tolerance. Particularly, the precision in controlling the coding length cannot be achieved by simply using bit-discard method. In the current network application, a real time transmission of image data between hetero-networks is highly demanded. The technique of quality of service (QoS) plays a crucial role. Only with a precise control of image coding length and quality of compression algorithm, the requirement of controlling QoS can be met. Under such circumstance, the embedded wavelet image compression technique plays an important role in the field of image communication.
To obtain an image frame with a real time compression high resolution, or to compress the image frame applying both high compression ratio and real time transmission, the digital signal processing (DSP) chip capable of running firmware program or hardware of a very large scaled integrated circuit (VLSI) is implemented. The current commercial wavelet compression system, especially the VLSI chip employing the conventional bit-discard method, does not use the modern embedding coding method. Therefore, the commercial DSP chip or VLSI chip cannot meet the requirement of QoS control.
In the embedded image coding theory, the sorting operation is performed on the transform coefficient after the stage of wavelet transform. The quantization is performed with accommodating the bit plane coding method. During the coding process, to accelerate the sorting operation and to enhance the compression efficiency, a conventional wavelet image compression algorithm is applied to a zero tree structure based on the relationship between the frequency and time domains of the wavelet transform coefficient. In fact, two lists, a dominant list and a subordinate list have to be maintained for the above algorithm. Firstly, all the wavelet transform coefficients are saved into the dominant list in a predetermined order. In the main operation procedure, the dominant list is scanned. With the zero tree as the common structure base at the two ends of the code, for all the coefficients with the absolute values are no less than the initial threshold value T0, the coordinates and the positive and negative signs thereof are coded (sorted). The coefficients are then shifted to the subordinate list. The original coefficients are erased to zero to ensure that there is no coding performed in the major operation procedure. In the subordinate operation procedure, the subordinary bit of all the coefficients in the subordinate list are coded (sorted) and output. By decreasing the threshold values into a half, the previous coding procedure is repeated until the code length is run out, or until reaching the minimum threshold value Tmin.
Due to the enormous memory and time expenditure for list operation, it is difficult to implement a low-cost embedded image hardware which adopts the conventional algorithm. More importantly, the memory space for list or tree structures is much larger than that of the conventional bit-discard method, the design difficulty and production cost are further increased.
The invention provides an image coding embedded in matrix operation (ICEM) and the status bit coding apparatus employed by the image coding. The advantages of progressive transmission, the precision in controlling the coding length are achieved to thoroughly adjust QoS of the network image transmission. More particularly, the used memory space is small and fixed, and the coding speed is accelerated to be well suitable for hardware implementation.
In the image coding embedded in matrix operation, a wavelet transform is performed on a pixel data to obtain a transform coefficient array. The DV gain in the transform coefficient array is removed. The transform coefficient array is scanned to construct a significant map array and a plurality of scaling auxiliary array. According to the scaling auxiliary array, the evaluated bit usage consumed by coding is estimated. Before the evaluated bit image reaches a coding warning value, an ICEM normal processing is performed according to the significant map array, followed by jumping to the foregoing step of estimating the evaluated bit usage. When the evaluated bit image reaches or exceeds the bit warning value, an ICEM final processing is executed according to the significant map array.
The above coding processing includes the following steps. By an array sequential scanning method and accommodating a bit plane coding method, the transform coefficient array is scanned. When L=Lmax, the status bits P, S, R are coded unconditionally. When L=Lmaxxe2x88x921 the status bits P, S, R, C are coded unconditionally, and when L less than Lmaxxe2x88x921 and L greater than 1, the status bit P, S, R, C coded according to Cij that is possibly the significant. The foregoing ICEM final processing includes the following steps. Using the array sequential scan and the bit plane coding, the above transform coefficient array is scanned. The coding status bit P, S are coded according to the above signal map array. When the actual consumed bit usage for coding does not reach the coding estimated value, status bits P, S, C of the residual transform coefficient are coded. When the actual bit usage for coding does not reach the coding estimated value, the status bit R is coded.
The coding logic for status bit P, S is:
If |Cij| less than 2T
If |Cij|xe2x89xa7T
P=1
If Cij greater than 0
S=0
Else
S=1
Else
P=0
The logic for determining the status bit R:
If |Cij|xe2x89xa72T
If |Cij|and T
R=1
Else
R=0
The logic for determining the status C:
If MAXMAGij less than 2T
If MAXMAGijxe2x89xa7T
C=1
Else
C=0
Wherein
The status bit P is the significant bit of mother tree.
The status bit S is the sign bit of the mother tree.
The status bit R is the refinement bit of the mother tree.
The status bit C is the significant bit of the subtree.
Cij is the transform coefficient at the coordinate (i, j).
MAXMAGij is the maximum absolute value of the node located at (i, j) of the subtree.
T is the threshold value.
L is the level, Lmax locates at the highest level of the hierarchical tree, and Lmin locates at the lowest level of the hierarchic tree.
The transform coefficient are scanned with the array sequential scanning method and the following formula are applied recursively to obtain the scaling auxiliary array:
M[Tn]=count of {Cij|Tn| less than =|Cij| less than Tnxe2x88x921}
MM[Tn]=count of {MAXMAGij|Tn less than =|MAXMAGij|Tnxe2x88x921}
MM2[Tn]=count of {MAXMAGij|Tn| less than =|MAXMAGij| less than Tnxe2x88x921, L greater than 1|}
The evaluated bit image consumed by estimating coding can be obtained by the following formula:
Pn=Pnxe2x88x921+MM[Tn]xc2x74xe2x88x92M[Tnxe2x88x921]
Sn=M[Tn]
Rn=Rnxe2x88x921+M[Tnxe2x88x921]
Cn=Cnxe2x88x921+MM2[Tn]xc2x74 xe2x88x92MM[Tnxe2x88x921]
Wherein
M[Tn], MM[Tn], MM2[Tn] are scaling auxiliary array.
Cij is the maximum absolute value of the node located at (i, j) of the subtree.
Tn is threshold value of the nth iteration.
L is the level.
Pn, Sn, Rn, Cn are the maximum coding length of the plurality of status bits P, S. R, C at the threshold values Tn.
In another embodiment of the invention, a status bit coding apparatus is provided. A significant bit filter uses an array sequential scanning method and the bit plane coding method to continuously scan the transform coefficient array. The possibly significant transform coefficient is output. The status bit P coding unit is coupled to the significant bit filter to code the above possibly significant transform coefficient as the status bit P. The status bit S coding unit is coupled to the significant bit filter to code the above possibly significant transform coefficient into the status bit S. The status bit C coding unit is coupled to the significant bit filter to code the above possibly significant transform coefficient into the status bit C. A bit budget controller is coupled to the status bit R coding unit and the status bit C coding unit to estimate the consumed evaluated bit usage for coding. When the evaluated coding usage reaches a warning value, the status bit R coding unit and the status bit C coding unit are controlled to stop coding status bits R, C.
The method of matrix-type image coding merges sorting and refinement processes based on an array and accommodate the stream control mechanism to achieve a novel concept for embedded image compression within a single stage. The status bit coding apparatus uses a simple algorithm logic, for example, comparison and logic computation, so that a small and fixed memory is required to accomplish and accelerate the embedded image compression in a singe stage. The design of bit budget control further enhances the compression efficiency. This is thus particular suitable for implementation of VLSI chip hardware or DSP chip firmware.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.